The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2013

Filed:

Jul. 26, 2011
Applicants:

Tsuyoshi Kawaguchi, Osaka, JP;

Norimasa Kitagawa, Osaka, JP;

Mamoru Sekiya, Osaka, JP;

Naofumi Shimasaki, Osaka, JP;

Yu Takehara, Osaka, JP;

Inventors:

Tsuyoshi Kawaguchi, Osaka, JP;

Norimasa Kitagawa, Osaka, JP;

Mamoru Sekiya, Osaka, JP;

Naofumi Shimasaki, Osaka, JP;

Yu Takehara, Osaka, JP;

Assignee:

Onkyo Corporation, Neyagawa-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

An amplifying circuit comprises: a first transistor, a second transistor, a third transistor and a fourth transistor provided to an input stage; and a first bias circuit. The input signal is input into a control terminal of the first transistor and a control terminal of the second transistor, a first terminal of the first transistor is connected to a first terminal of the third transistor, a first terminal of the second transistor is connected to a first terminal of the fourth transistor, a second terminal of the first transistor is connected to a first potential, a second terminal of the second transistor is connected to a second potential that is equal to or different from the first potential, a second terminal of the third transistor is connected to a third potential, a second terminal of the fourth transistor is connected to a fourth potential, the first bias circuit is connected between a control terminal of the third transistor and a control terminal of the fourth transistor.


Find Patent Forward Citations

Loading…