The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2013

Filed:

Apr. 13, 2006
Applicants:

Rinze I. M. P. Meijer, Herkenbosch, NL;

Sandeep Kumar Goel, San Jose, CA (US);

Jose DE Jesus Pineda DE Gyvez, Eindhoven, NL;

Inventors:

Rinze I. M. P. Meijer, Herkenbosch, NL;

Sandeep Kumar Goel, San Jose, CA (US);

Jose De Jesus Pineda De Gyvez, Eindhoven, NL;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

The integrated circuit () has an internal power supply domain with a power supply voltage adaptation circuit () to adapt the power supply voltage in the power supply domain. Typically, a plurality of such domains is provided wherein the power supply voltage can be adapted independently. During testing an internal power supply voltage is supplied to a temporally integrating analog to digital conversion circuit () in the integrating circuit (). A temporally integrated value of the power supply voltage is measured during a measurement period. Preferably, integrating measurements of a plurality of internal supply voltages are performed in parallel during the same measurement time interval. Preferably a further test is performed by changing over between mutually different supply voltages during a further measurement period. In this way the measured integrated supply voltage can be used to check the speed of the change over between the different voltages.


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