The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2013

Filed:

Aug. 29, 2011
Applicants:

Jong-pil Son, Yongin-si, KR;

Seong-jin Jang, Seongnam-si, KR;

Byung-sik Moon, Seoul, KR;

Doo-young Kim, Seongnam-si, KR;

Ju-seop Park, Seongnam-si, KR;

Inventors:

Jong-Pil Son, Yongin-si, KR;

Seong-Jin Jang, Seongnam-si, KR;

Byung-Sik Moon, Seoul, KR;

Doo-Young Kim, Seongnam-si, KR;

Ju-Seop Park, Seongnam-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/405 (2006.01);
U.S. Cl.
CPC ...
G11C 11/405 (2013.01);
Abstract

A memory cell includes a selection transistor on a substrate and an antifuse on the substrate. The selection transistor includes a first gate connected to a read word line, a first gate insulation layer that insulates the first gate from the substrate, a first source region connected to a bit line, and a first drain region, an impurity concentration of the first drain region being lower than an impurity concentration of the first source region. The antifuse includes a first electrode connected to a program word line and a second electrode connected to the selection transistor.


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