Semiconductor device

Abstract

A transistor structure that improves an ESD withstand voltage is offered. There is formed a P-type insulating isolation layer that divides an N-type epitaxial layer into a plurality of regions and isolates neighboring regions from each other. A diffusion layer doped with high concentration N-type impurities and an electrode extraction layer are formed in a surface of the epitaxial layer between a low impurity concentration drain layer and the insulating isolation layer. The diffusion layer and the electrode extraction layer are connected with a drain electrode. When an excessive positive surge voltage is applied to a source electrode, a parasitic diode that makes a current path including the diffusion layer and the electrode extraction layer is turned on to shunt an ESD current from the source electrode to the drain electrode, in addition to other parasitic diodes included in a conventional structure.