The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8546233 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 01, 2013

Filed:

Nov. 09, 2009
Applicant:

Anton Steltenpohl, Munich, DE;

Inventor:

Anton Steltenpohl, Munich, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method produces integrated circuit arrangement that includes an undulating capacitor in a conductive structure layer. The surface area of the capacitor is enlarged in comparison with an even capacitor. The capacitor is interlinked with dielectric regions at its top side and/or its underside, so that it can be produced by methods which may not have to be altered in comparison with conventional CMP methods.


Find Patent Forward Citations

Steltenpohl, Anton. (2013). Method for producing an integrated circuit arrangement with capacitor in an interconnect layer (U.S. Patent No. 8546233). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8546233

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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