The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2013

Filed:

Dec. 18, 2006
Applicants:

Jai N. Subrahmanyam, Santa Clara, CA (US);

Chinnappa K. Ganapathy, San Diego, CA (US);

Durk L. Van Veen, Santee, CA (US);

Jinxia Bai, San Diego, CA (US);

Kevin S. Cousineau, Ramona, CA (US);

Seokyong OH, San Diego, CA (US);

Inventors:

Jai N. Subrahmanyam, Santa Clara, CA (US);

Chinnappa K. Ganapathy, San Diego, CA (US);

Durk L. Van Veen, Santee, CA (US);

Jinxia Bai, San Diego, CA (US);

Kevin S. Cousineau, Ramona, CA (US);

Seokyong Oh, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

Techniques for perforating IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory with a first, second and third sections, an encoder configured to process data in each of the first, second and third memory sections in a round robin fashion, an IFFT configured to process the encoded data in each of the first, second, and third sections in a round robin fashion, and a post-processor configured to process the IFFT processed data in each of the first, second and third memory sections in a round robin fashion.


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