The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2013

Filed:

Apr. 06, 2012
Applicant:

James L. Vorhaus, Chapel Hill, NC (US);

Inventor:

James L. Vorhaus, Chapel Hill, NC (US);

Assignee:

Sarda Technologies, Inc., Durham, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
Abstract

Various aspects of the technology provide a dual semiconductor power and/or switching FET device to replace two or more discrete FET devices. Portions of the current may be distributed in parallel to sections of the source and drain fingers to maintain a low current density and reduce the size while increasing the overall current handling capabilities of the dual FET. Application of the gate signal to both ends of gate fingers, for example, using a serpentine arrangement of the gate fingers and gate pads, simplifies layout of the dual FET device. A single integral ohmic metal finger including both source functions and drain functions reduces conductors and contacts for connecting the two devices at a source-drain node. Heat developed in the source, drain, and gate fingers may be conducted through the vias to the electrodes and out of the device.


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