The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2013
Filed:
Nov. 25, 2009
Yasuyoshi Uchida, Tokyo, JP;
Kazutaka Nara, Tokyo, JP;
Yasuyoshi Uchida, Tokyo, JP;
Kazutaka Nara, Tokyo, JP;
Furukawa Electric Co., Ltd., Tokyo, JP;
Abstract
There is provided a SSC chip whose yield may be improved and whose processing steps may be simplified as compare to those of a prior art PLC chip having a light waveguide circuit to which a spot-size converter (SSC) is added, a fiber array attached with the SSC chip, a PLC module attached with the SSC chip and a method for manufacturing the SSC chip. The SSC chip has four spot-size converters and is fabricated separately from a PLC chip. Each SSC has a straight waveguide having the same core width and height with an end of an input/output waveguide of the PLC chip, a horizontally tapered waveguide in which the core width is enlarged in a tapered shape in the horizontal direction from the core width of the straight waveguide, a vertically tapered waveguide in which the core height is enlarged in a tapered shape in the vertical direction from the core height of the horizontally tapered waveguide and a spot-size enlarged portion whose core width and core height are both enlarged. Because it is unnecessary to fabricate the SSC at the end of the input/output waveguide of the PLC chip, a yield of the PLC chip may be improved.