The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2013

Filed:

Feb. 26, 2009
Applicants:

Daniel J. Lamey, Phoenix, AZ (US);

David C. Burdeaux, Tempe, AZ (US);

Olivier Lembeye, Saint Lys, FR;

Inventors:

Daniel J. Lamey, Phoenix, AZ (US);

David C. Burdeaux, Tempe, AZ (US);

Olivier Lembeye, Saint Lys, FR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electrostatic discharge (ESD) protection circuit () is coupled across input-output (I/O) pads () and common terminals () of a core circuit () to protect it from ESD events. The circuit () comprises, a unidirectional ESD clamp () and two or more floating diodes () arranged in parallel opposed configuration in series with the ESD clamp (), the combination coupled between the I/O pads () and the reference terminals (). In a preferred arrangement, the two strings of opposed parallel coupled diodes () are used with different numbers of diodes in each string. These diodes () operate in forward conduction (), so the energy dissipated therein during an ESD event is much reduced compared to a reverse biased diode and they can have smaller area. Signal clipping at the I/O pad () is reduced, less power is dissipated and less chip area is utilized.


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