The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2013

Filed:

Nov. 04, 2011
Applicants:

Rajiv Chandrasekaran, Bridgewater, NJ (US);

George P. Vella-coleiro, Summit, NJ (US);

Inventors:

Rajiv Chandrasekaran, Bridgewater, NJ (US);

George P. Vella-Coleiro, Summit, NJ (US);

Assignee:

Andrew LLC, Hickory, NC (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

A non-linear amplifier is linearized using interpolation-based digital pre-distortion (DPD). In one embodiment, the digital input signal is interpolated to generate a higher-sample-rate signal that is then pre-distorted. The resulting higher-sample-rate pre-distorted signal is then decimated to generate a final pre-distorted digital signal that is converted into an analog pre-distorted signal by a digital-to-analog converter (DAC) before being applied to the amplifier. In a polyphase embodiment, different versions of the original input digital signal are generated, where each version is then pre-distorted using a different DPD module to generate a different intermediate pre-distorted digital signal. The intermediate pre-distorted signals are filtered and combined to generate the final pre-distorted digital signal. In both embodiments, better linearization (e.g., less aliasing) can be achieved without increasing the sample rate of the DAC and, in the polyphase embodiment, without increasing the processing speed of the DPD modules.


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