The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2013

Filed:

Apr. 22, 2011
Applicants:

Fumiyasu Utsunomiya, Chiba, JP;

Taro Yamasaki, Chiba, JP;

Isamu Fujii, Chiba, JP;

Inventors:

Fumiyasu Utsunomiya, Chiba, JP;

Taro Yamasaki, Chiba, JP;

Isamu Fujii, Chiba, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 31/062 (2012.01);
U.S. Cl.
CPC ...
Abstract

Provided is a light receiving circuit for detecting a change in amount of light, in which an input circuit at a subsequent stage is compact and inexpensive and current consumption is low. The light receiving circuit includes: a photoelectric conversion element for supplying a current corresponding to an amount of incident light; an N-channel MOS transistor including a drain supplied with the current from the photoelectric conversion element; and a control circuit for controlling a gate voltage of the NMOS transistor via a low pass filter so that a drain voltage of the N-channel MOS transistor becomes a desired voltage. The control circuit outputs a control state output signal, which is a GND terminal voltage when a delay amount of control on the gate voltage of the NMOS transistor performed via the low pass filter is less than a desired delay amount, and is the drain voltage of the NMOS transistor when the delay amount of control on the gate voltage of the NMOS transistor performed via the low pass filter is the desired delay amount or more. The light receiving circuit outputs the control state output signal as an output signal.


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