The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2013

Filed:

Oct. 15, 2010
Applicant:

Zhimin Jamie Yao, Goleta, CA (US);

Inventor:

Zhimin Jamie Yao, Goleta, CA (US);

Assignee:

Cree, Inc., Durham, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

An LED chip and method of fabricating the same is disclosed that comprises a plurality of sub-LEDs, said sub-LEDs interconnected such that the voltage necessary to drive said sub-LEDs is dependent on the number of said interconnected sub-LEDs and the junction voltage of said sub-LEDs. Each of said interconnected sub-LEDs comprising an n-type semiconductor layer, a p-type semiconductor layer, and an active or quantum well region interposed between the n-type and p-type layers. The monolithic LED chip further comprising a p-electrode having a lead that is accessible from a point on a surface opposite of a primary emission surface of the monolithic LED chip, the p-electrode electrically connected to the p-type layer, and an n-electrode having a lead that is accessible from a point on the surface opposite of the primary emission surface, the n-electrode electrically connected to the n-type layer. These sub-LEDs interconnected by at least a metallization layer on the n-type and p-type layers, which is insulated so that it does not short the sub-LEDs. Further, the LED chip is capable of being electrically coupled for operation without wire bonds.


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