The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2013

Filed:

Aug. 31, 2012
Applicants:

Yasutomo Onozaki, Chiba, JP;

Tetsuaki Utsumi, Yokohama, JP;

Akira Wada, Tokyo, JP;

Inventors:

Yasutomo Onozaki, Chiba, JP;

Tetsuaki Utsumi, Yokohama, JP;

Akira Wada, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one embodiment, a designing apparatus includes a register position determining module, a net list generator, and a layout data generator. The register position determining module determines a register position on a layout of a semiconductor integrated circuit from a hardware description. The net list generator generates a net list according to the register position. The layout data generator generates layout data based on the net list. The layout data indicates the layout of the semiconductor integrated circuit.


Find Patent Forward Citations

Onozaki, Yasutomo. (2013). Apparatus, method and medium storing program for designing semiconductor integrated circuit (U.S. Patent No. 8533646). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8533646

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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