Systems and methods for precise timing measurements using high-speed deserializers

Abstract

Systems and methods are disclosed for precise event time measurement using high-speed deserializer circuitry. The described embodiments utilize high speed deserializer circuitry to achieve a precision based upon a bit period associated with the operation of the high speed operation of the deserializer circuitry rather than upon slower speed clock periods associated with reference clock signals. In certain embodiments, the disclosed systems and methods receive an event occurrence signal and use deserializer circuitry to sample the event occurrence signal and to produce multi-bit parallel data representing the event occurrence signal. Precise timestamps can then be generated based upon the multi-bit parallel data. Advantageously, the precision of these time measurements is associated with the bit period of the high speed operation of the deserializer circuitry and are not limited to lower speeds at which other circuitry within the system may be operating, for example, based upon a slower reference clock signal.