The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2013
Filed:
Dec. 19, 2008
Remco Van DE Beek, Eindhoven, NL;
Domine Leenaerts, Riethoven, NL;
Charles Razzell, Pleasanton, CA (US);
Jozef R. M. Ervoet, Eindhoven, NL;
Remco Van De Beek, Eindhoven, NL;
Domine Leenaerts, Riethoven, NL;
Charles Razzell, Pleasanton, CA (US);
Jozef R. M. Ervoet, Eindhoven, NL;
St-Ericsson SA, Plan-les-Ouates, CH;
Abstract
A signal processing circuit comprises a frequency up-conversion circuit () for performing up-conversion with a first local oscillator frequency and a frequency down-conversion circuit () for performing down-conversion with a second local oscillator frequency. A digital signal processor () controls supply first signals representing a first complex signal to the up-conversion circuit, and receives second signals representing a second complex signal. The digital signal processor controls a compensation of I/Q mismatch of results of up-conversion and/or down-conversion. The digital signal processor () switches to a calibration mode for selecting a parameter of said compensation. In the calibration mode the first and second local oscillator frequencies have a frequency offset with respect to each other. The digital signal processor () measures an amplitude of a frequency component at a frequency corresponding to mismatch in one and not more than one of the results of up-conversion and/or down-conversion, and selects the parameter dependent on the amplitude.