The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2013
Filed:
Nov. 11, 2012
Yoshihiko Hotta, Tokyo, JP;
Seiichi Saito, Tokyo, JP;
Hiroyuki Hamasaki, Tokyo, JP;
Hirotaka Hara, Tokyo, JP;
Itaru Nonomura, Tokyo, JP;
Yoshihiko Hotta, Tokyo, JP;
Seiichi Saito, Tokyo, JP;
Hiroyuki Hamasaki, Tokyo, JP;
Hirotaka Hara, Tokyo, JP;
Itaru Nonomura, Tokyo, JP;
Renesas Electronics Corporation, Kawasaki-shi, JP;
Abstract
In a data processor having a bus controller that performs timing control of access from the CPU operated in synchronization with a high-speed first clock signal to a peripheral circuit operated in synchronization with a low-speed second clock signal, a timing control circuit is provided between the peripheral circuit and the bus controller, and the bus controller causes, in response to a read instruction from the peripheral circuit, the timing control circuit to output data held by the peripheral circuit to the bus controller in synchronization with the cycle of the high-speed clock signal, causes the timing control circuit to start, in response to a write instruction directed to the peripheral circuit, writing into the peripheral circuit in synchronization with the cycle of the high-speed clock signal, and terminates the writing in synchronization with the cycle of the low-speed clock signal.