The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2013
Filed:
Oct. 06, 2010
Peter J. Hopper, San Jose, CA (US);
Peter Johnson, Sunnyvale, CA (US);
Kyuwoon Hwang, Palo Alto, CA (US);
Andrei Papou, San Jose, CA (US);
Peter J. Hopper, San Jose, CA (US);
Peter Johnson, Sunnyvale, CA (US);
Kyuwoon Hwang, Palo Alto, CA (US);
Andrei Papou, San Jose, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
An apparatus and method for wafer level fabrication of high value inductors directly on top of semiconductor integrated circuits. The apparatus and method includes fabricating a semiconductor wafer including a plurality of dice, each of the dice including power circuitry and a switching node. Once the wafer is fabricated, then a plurality of inductors are fabricated directly onto the plurality of dice on the wafer respectively. Each inductor is fabricated by forming a plurality of magnetic core inductor members on an interconnect dielectric layer formed on the wafer. An insulating layer, and then inductor coils, are then formed over the plurality of magnetic core inductor members over each die. A plated magnetic layer is formed over the plurality of inductors respectively to raise the permeability and inductance of the structure.