The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2013
Filed:
Nov. 27, 2008
Jean Michel Reynes, Pompertuzat, FR;
Beatrice Bernoux, Tournefeuille, FR;
Rene Escoffier, Mauzac, FR;
Pierre Jalbaud, Segreville, FR;
Ivana Deram, Colomiers, FR;
Jean Michel Reynes, Pompertuzat, FR;
Beatrice Bernoux, Tournefeuille, FR;
Rene Escoffier, Mauzac, FR;
Pierre Jalbaud, Segreville, FR;
Ivana Deram, Colomiers, FR;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A transistor power switch device comprising an array of vertical transistor elements for carrying current between the first and second faces of a semiconductor body and a vertical avalanche diode electrically in parallel with the array of vertical transistors. The array of transistor elements includes at the first face an array of source regions of a first semiconductor type, at least one p region of a second semiconductor type opposite to the first type interposed between the source regions and the second face, at least one control electrode for switchably controlling flow of the current through the p region, and a conductive layer contacting the source regions and insulated from the control electrode. The vertical avalanche diode is configured to conduct breakdown current between the first and second faces in the off state of the device and having a first current carrying diode region of the second semiconductor type in contact with the first face and with the conductive layer and a second semiconductor region of the first semiconductor type electrically connected with the second face.