The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2013
Filed:
Jul. 14, 2011
Junya Onishi, Osaka, JP;
Shinobu Yamazaki, Osaka, JP;
Kazuya Ishihara, Osaka, JP;
Yushi Inoue, Osaka, JP;
Yukio Tamai, Osaka, JP;
Nobuyoshi Awaya, Osaka, JP;
Junya Onishi, Osaka, JP;
Shinobu Yamazaki, Osaka, JP;
Kazuya Ishihara, Osaka, JP;
Yushi Inoue, Osaka, JP;
Yukio Tamai, Osaka, JP;
Nobuyoshi Awaya, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A variable resistance element that can stably perform a switching operation with a property variation being reduced by suppressing a sharp current that accompanies completion of forming process, and a non-volatile semiconductor memory device including the variable resistance element are realized. The non-volatile semiconductor memory device uses the variable resistance element for storing information in which a resistance changing layer is interposed between a first electrode and a second electrode, and a buffer layer is inserted between the first electrode and the resistance changing layer where a switching interface is formed. The buffer layer and the resistance changing layer include n-type metal oxides, and materials of the buffer layer and the resistance changing layer are selected such that energy at a bottom of a conduction band of the n-type metal oxide configuring the buffer layer is lower than that of the n-type metal oxide configuring the resistance changing layer.