The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2013

Filed:

Jan. 31, 2006
Applicants:

Victor Roberts Augsburg, Cary, NC (US);

James Norris Dieffenderfer, Apex, NC (US);

Jeffrey Todd Bridges, Raleigh, NC (US);

Thomas Andrew Sartorius, Raleigh, NC (US);

Inventors:

Victor Roberts Augsburg, Cary, NC (US);

James Norris Dieffenderfer, Apex, NC (US);

Jeffrey Todd Bridges, Raleigh, NC (US);

Thomas Andrew Sartorius, Raleigh, NC (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 3/00 (2006.01); G06F 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A Block Normal Cache Allocation (BNCA) mode is defined for a processor. In BNCA mode, cache entries may only be allocated by predetermined instructions. Normal memory access instructions (for example, as part of interrupt code) may execute and will retrieve data from main memory in the event of a cache miss; however, these instructions are not allowed to allocate entries in the cache. Only the predetermined instructions (for example, those used to establish locked cache entries) may allocate entries in the cache. When the locked entries are established, the processor exits BNCA mode, and any memory access instruction may allocate cache entries. BNCA mode may be indicated by setting a bit in a configuration register.


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