The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2013
Filed:
Jul. 27, 2011
Allen M. Schwartz, Fort Wayne, IN (US);
Andrew L. Martin, Fort Wayne, IN (US);
Allen M. Schwartz, Fort Wayne, IN (US);
Andrew L. Martin, Fort Wayne, IN (US);
Raytheon Company, Waltham, MA (US);
Abstract
System and method for implementing a secure processor data bus are described. One embodiment is a circuit comprising a processor disposed in a processor partition, the circuit further comprising a first set of peripherals disposed in a first peripheral partition; a second set of peripherals disposed in a second peripheral partition physically isolated from the first peripheral partition; a first state control register for controlling access to the first set of peripherals by the processor; and a second state control register for controlling access to the second set of peripherals by the processor. When the first and second state control registers are in a first mode of operation, the processor has read and write access to the first set of peripherals and write only access to the second set of peripherals. When the first and second state control registers are in a second mode of operation, the processor has read and write access to the second set of peripherals and read only access to the first set of peripherals.