The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2013
Filed:
Aug. 27, 2011
Jae Bum Ko, Icheon-si, KR;
Jae Bum Ko, Icheon-si, KR;
SK Hynix Inc., Gyeonggi-do, KR;
Abstract
An address delay circuit of a semiconductor memory apparatus includes a first group control pulse generation unit configured to generate a first control pulse after input of a first group column address strobe pulse and passage of a time corresponding to a first set multiple of one cycle of a clock, a second group control pulse generation unit configured to generate a second control pulse after input of a second group column strobe address pulse and passage of a time corresponding to a second set multiple of the one cycle of the clock, a first address storage unit configured to receive and store a first group external address in response to the first control pulse, and output a first group internal address, and a second address storage unit configured to receive and store a second group external address in response to the second control pulse, and output a second group internal address.