The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2013
Filed:
Jan. 10, 2011
Bharata B. Rao, Bangalore, IN;
Vaidyanathan Srinivasan, Bangalore, IN;
Vaddagiri Srivatsa, Bangalore, IN;
Bharata B. Rao, Bangalore, IN;
Vaidyanathan Srinivasan, Bangalore, IN;
Vaddagiri Srivatsa, Bangalore, IN;
International Business Machines Corporation, Armonk, NY (US);
Abstract
Task placement is influenced within a multiple processor computer. Tasks are classified as either memory bound or CPU bound by observing certain performance counters over the task execution. During a first pass of task load balance, tasks are balanced across various CPUs to achieve a fairness goal, where tasks are allocated CPU resources in accordance to their established fairness priority value. During a second pass of task load balance, tasks are rebalanced across CPUs to reduce CPU resource contention, such that the rebalance of tasks in the second pass does not violate fairness goals established in the first pass. In one embodiment, the second pass could involve re-balancing memory bound tasks across different cache domains, where CPUs in a cache domain share a same last mile CPU cache such as an L3 cache. In another embodiment, the second pass could involve re-balancing CPU bound tasks across different CPU domains of a cache domain, where CPUs in a CPU domain could be sharing some or all of CPU execution unit resources. The two passes could be executed at different frequencies.