The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2013

Filed:

Sep. 09, 2011
Applicants:

Venkatesh Srinivasan, Dallas, TX (US);

Vijay B. Rentala, Plano, TX (US);

Victoria W. Limetkai, Dallas, TX (US);

Baher Haroun, Allen, TX (US);

Inventors:

Venkatesh Srinivasan, Dallas, TX (US);

Vijay B. Rentala, Plano, TX (US);

Victoria W. Limetkai, Dallas, TX (US);

Baher Haroun, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

In higher order sigma-delta modulators (SDMs), there are oftentimes errors introduced by the digital-to-analog (DAC) switches. Namely, parasitic capacitances associated with switches can introduce second harmonic spurs. Here, however, compensation circuits and buffers are provided. The buffers bias the switches in saturation, and the compensation circuits provide a 'ground boost' for the buffers. The combination of the buffer and compensation circuit reduces the second harmonic spur, while also improving the Signal-to-Noise Ratio (SNR) and Signal-to-Noise-plus-Distortion Ratio (SNDR).


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