The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2013
Filed:
May. 06, 2011
Ji-su Ahn, Yongin, KR;
Kwang-nam Kim, Yongin, KR;
Jae-yong Lee, Yongin, KR;
Beong-ju Kim, Yongin, KR;
In-young Jung, Yongin, KR;
Ji-Su Ahn, Yongin, KR;
Kwang-Nam Kim, Yongin, KR;
Jae-Yong Lee, Yongin, KR;
Beong-Ju Kim, Yongin, KR;
In-Young Jung, Yongin, KR;
Samsung Display Co., Ltd., Giheung-Gu, Yongin, Gyeonggi-do, KR;
Abstract
The present invention relates generally to a thin film transistor, an organic light emitting diode (OLED) display including the same, and manufacturing methods of them. The thin film transistor comprises: a substrate; a gate electrode disposed on the substrate; a gate insulating layer disposed on the gate electrode; a semiconductor layer disposed on the gate insulating layer; an inter layer dielectric disposed on the entire surface of the substrate; and source and drain electrodes disposed on the inter layer dielectric and connected to the semiconductor layer, and in which the gate electrode is disposed so as to correspond to the entire surface of the semiconductor layer, and a manufacturing method thereof. The organic light emitting diode (OLED) display comprises the elements of the thin film transistor described above, and also includes an insulating film disposed on the entire surface of the substrate, and a first electrode, an organic layer, and a second electrode disposed on the insulating film, the first electrode being electrically connected to any one of the source and drain electrodes, and the gate electrode is disposed so as to correspond to the entire surface of the semiconductor layer.