The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2013
Filed:
Sep. 18, 2011
Yoshihiko Kamata, Yokohama, JP;
Fumitaka Taniwaki, Kawasaki, JP;
Hirotaka Kariya, Yokohama, JP;
Yuki Shimizu, Kawasaki, JP;
Shirou Fujita, Kamakura, JP;
Yoshihiko Kamata, Yokohama, JP;
Fumitaka Taniwaki, Kawasaki, JP;
Hirotaka Kariya, Yokohama, JP;
Yuki Shimizu, Kawasaki, JP;
Shirou Fujita, Kamakura, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to one embodiment, a semiconductor storage device includes a cell array, an even line, an odd line, and sense amplifiers. The cell array includes memory cells holding data. The even line connects to the memory cells. The odd line connects to the memory cells. The memory cells connect to an odd column or the even column. Each the sense amplifiers selectively connect to the odd line or the even line. Each the sense amplifiers includes a latch circuit, a first transistor, a second transistor, and a third transistor. The latch circuit includes a first node and a second node, and holds the data supplied to the first node. The first transistor supplies read data to the latch circuit. The second transistor transfers the data held by the latch circuit to the wiring. The third transistor transfers the data held by the latch circuit to the wiring.