The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2013
Filed:
Feb. 11, 2009
Michael F. Mcmahon, East Syracuse, NY (US);
Kent R. Morgan, Groton, NY (US);
Richard Weeks, Little York, NY (US);
David A. Finlay, Sr., Marietta, NY (US);
Thomas N. Packard, Syracuse, NY (US);
Michael F. McMahon, East Syracuse, NY (US);
Kent R. Morgan, Groton, NY (US);
Richard Weeks, Little York, NY (US);
David A. Finlay, Sr., Marietta, NY (US);
Thomas N. Packard, Syracuse, NY (US);
Pass & Seymour, Inc., Syracuse, NY (US);
Abstract
The present invention is directed to an electrical wiring device including a plurality of line terminals configured to be connected to a source of AC power, and a plurality of load terminals. A detection assembly is coupled to the plurality of line terminals and the plurality of load terminals. The detection assembly is configured to detect a wiring state associated with the plurality of line terminals and the plurality of load terminals. The detection assembly includes a primary wiring state detection circuit, a secondary wiring state detection circuit, and an isolation circuit disposed therebetween, the isolation circuit being configured to electrically isolate the line terminals from the secondary wiring state detection circuit in the tripped state. The device also includes a circuit interrupting assembly that includes four sets of interrupting contacts that are configured to provide electrical continuity between the line terminals and the load terminals in a reset state and configured to interrupt the electrical continuity in a tripped state. The circuit interrupting assembly is substantially prevented from effecting the reset state absent a predetermined successful proper installation signal from the primary wiring state detection circuit.