The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2013

Filed:

Aug. 29, 2011
Applicants:

Leonardus Hesen, Hegelson, NL;

Johannes Antonius Frambach, Nijmegen, NL;

Paul Mateman, Millingen Aan de Rijn, NL;

Inventors:

Leonardus Hesen, Hegelson, NL;

Johannes Antonius Frambach, Nijmegen, NL;

Paul Mateman, Millingen Aan de Rijn, NL;

Assignee:

ST-Ericsson SA, Plan-les-Ouates, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01);
U.S. Cl.
CPC ...
Abstract

A duty-cycle correction circuit comprises a plurality of AC-coupled, independently-biased inverter stages connected in series. A periodic signal is applied to an input of the plurality of inverter stages. Each inverter stage comprises an inverter with a resistive element connected in feedback between its output and input nodes. Each inverter stage is AC-coupled to a prior stage via a capacitor. The AC-coupling allows the signal to pass between inverter stages, but DC-isolates each inverter stage from adjacent stages, allowing each stage to maintain an independent DC bias of the signal at that stage. By virtue of the feedback resistive element, each stage defines a transition point between high and low signal states. Due to non-zero rise and fall times of the periodic signal, the independent DC bias of each stage is operative to incrementally shift the transition point of the periodic signal at each stage towards a desired duty-cycle.


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