The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2013

Filed:

Dec. 02, 2011
Applicants:

Sang-hun Jung, Icheon-si, KR;

Dong Wuuk Seo, Asan-si, KR;

Gwang-bum Ko, Asan-si, KR;

Sun-jung Lee, Asan-si, KR;

Inventors:

Sang-Hun Jung, Icheon-si, KR;

Dong Wuuk Seo, Asan-si, KR;

Gwang-Bum Ko, Asan-si, KR;

Sun-Jung Lee, Asan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates to a thin film transistor array panel and a manufacturing method thereof, and a thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a first conductive layer disposed on the substrate; a second conductive layer overlapping at least a portion of the edge of the first conductive layer on the first conductive layer and including a first portion overlapping the first conductive layer and a second portion not overlapping the first conductive layer; a first insulating layer disposed on the second conductive layer and having a contact hole exposing at least a portion of a boundary between the first portion and the second portion; and a third conductive layer disposed on the first insulating layer and simultaneously contacting the first portion and the second portion that are exposed through the contact hole.


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