The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2013
Filed:
Feb. 22, 2011
Jae-hak Lee, Daejeon, KR;
Chang-woo Lee, Daejeon, KR;
Joon-yub Song, Daejeon, KR;
Tae-ho Ha, Daejeon, KR;
Jae-Hak Lee, Daejeon, KR;
Chang-Woo Lee, Daejeon, KR;
Joon-Yub Song, Daejeon, KR;
Tae-Ho Ha, Daejeon, KR;
Korea Institute of Machinery & Materials, Daejeon, KR;
Abstract
The present invention relates to a through silicon via (TSV) for 3D packaging to integrate a semiconductor device and a method for manufacturing the same, and more particularly, to a through silicon via (TSV) for 3D packaging of a semiconductor device that is capable of improving production efficiency, having very high electric conductivity, and minimizing electrical signal delay, without using a carrier wafer by self-aligning substrates in a low temperature state and sequentially bonding a plurality of semiconductor dies (or semiconductor chips), and a method of manufacturing the same.