The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2013

Filed:

Oct. 28, 2010
Applicants:

Ryo Suzuki, Ibaraki, JP;

Hiroshi Takamura, Ibaraki, JP;

Inventors:

Ryo Suzuki, Ibaraki, JP;

Hiroshi Takamura, Ibaraki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B 9/04 (2006.01); B32B 13/04 (2006.01); C01B 33/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A hybrid silicon wafer which is a silicon wafer having a structure wherein the main plane orientation of polycrystalline silicon that is prepared by a unidirectional solidification/melting method is (311), and monocrystalline silicon is embedded in the polycrystalline silicon. The hybrid silicon wafer according to any one of claimsto, wherein the purity of the polycrystalline silicon portion excluding gas components is 6N or higher, the total amount of metal impurities is 1 wtppm or less, and, among the metal impurities, Cu, Fe, Ni, and Al are respectively 0.1 wtppm or less. Thus, a hybrid silicon wafer having the functions of both a polycrystalline silicon wafer and a monocrystalline silicon wafer is provided and the occurrence of polish bumps and macro-sized unevenness between the polycrystalline silicon and the monocrystalline silicon are prevented.


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