The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2013

Filed:

Mar. 07, 2011
Applicants:

Wen-tsan Hsieh, Kaohsiung, TW;

Jen-chieh Yeh, Hsinchu, TW;

Hong-jie Huang, Tainan, TW;

I-yao Chuang, Hsinchu County, TW;

Inventors:

Wen-Tsan Hsieh, Kaohsiung, TW;

Jen-Chieh Yeh, Hsinchu, TW;

Hong-Jie Huang, Tainan, TW;

I-Yao Chuang, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5022 (2013.01); G06F 17/504 (2013.01); G06F 17/505 (2013.01);
Abstract

A transaction level (TL) system power estimation method and system are provided. The method includes inserting at least a characteristic extractor into an electronic device of a target system. The characteristic extractor extracts at least a power characteristic of the electronic device when a TL simulation is proceeding. The power characteristic provided from the characteristic extractor is converted to at least a power consumption value by using a power model. The power consumption value is recorded into a power database, for analyzing power consumption of the whole target system. In some embodiments, the TL system power estimation method and system can be applied in the target system with dynamic power management. The TL system power estimation method and system also can be used with a high-level synthesizer to develop the power-aware electronic device in a short time.


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