The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2013

Filed:

Jun. 08, 2009
Applicants:

Gayathri A. Bhagavatheeswaran, Austin, TX (US);

Joseph P. Gergen, Manchaca, TX (US);

Arvind Raman, Austin, TX (US);

Hector Sanchez, Cedar Park, TX (US);

Inventors:

Gayathri A. Bhagavatheeswaran, Austin, TX (US);

Joseph P. Gergen, Manchaca, TX (US);

Arvind Raman, Austin, TX (US);

Hector Sanchez, Cedar Park, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01);
U.S. Cl.
CPC ...
Abstract

A phase locked loop device includes a phase detector that measures a difference in phase between a reference clock signal and an output clock signal provided to a device module. The phase detector provides a pulse having a width indicative of the phase difference. If the phase difference exceeds one of a plurality of threshold values, an indicator can be asserted. Based on the indicator, a control module can take remedial action, such as providing a different clock signal to the device module or triggering an interrupt at a processor device.


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