The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2013

Filed:

Aug. 05, 2009
Applicants:

Jia-hui Wang, Tainan, TW;

Chien-hung Tsai, Tainan, TW;

Ying-lieh Chen, Tainan, TW;

Chin-tien Chang, Tainan, TW;

Inventors:

Jia-Hui Wang, Tainan, TW;

Chien-Hung Tsai, Tainan, TW;

Ying-Lieh Chen, Tainan, TW;

Chin-Tien Chang, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/038 (2013.01);
U.S. Cl.
CPC ...
Abstract

A buffering circuit with reduced power consumption is provided. The output buffering circuit includes first and second amplifier circuits. The first amplifier circuit includes a first input stage and a first output stage both coupled between a first power voltage and a second power voltage lower than the first power voltage, and an assistant discharging unit configured to provide a discharging current flowing from a first output node to a first intermediate power voltage during a discharging operation of the first amplifier circuit. The second amplifier circuit includes a second input stage and a second output stage both coupled between the first power voltage and the second power voltage, and an assistant charging unit configured to provide a charging current flowing from a second intermediate power voltage to a second output node during a charging operation of the second amplifier circuit. The first and second amplifier circuits can have reduced output voltage ranges and hence reduced total power consumption.


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