The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2013
Filed:
Jan. 30, 2013
Donald P. Richmond, Ii, Palo Alto, CA (US);
Kenneth W. Deboe, Santa Clara, CA (US);
Frank O. Uher, Los Altos, CA (US);
Jovan Jovanovic, Santa Clara, CA (US);
Scott E. Lindsey, Brentwood, CA (US);
Thomas T. Maenner, San Ramon, CA (US);
Patrick M. Shepherd, San Jose, CA (US);
Jeffrey L. Tyson, Mountain View, CA (US);
Mark C. Carbone, Cupertino, CA (US);
Paul W. Burke, Hayward, CA (US);
Doan D. Cao, San Jose, CA (US);
James F. Tomic, Oakland, CA (US);
Long V. VU, San Jose, CA (US);
Donald P. Richmond, II, Palo Alto, CA (US);
Kenneth W. Deboe, Santa Clara, CA (US);
Frank O. Uher, Los Altos, CA (US);
Jovan Jovanovic, Santa Clara, CA (US);
Scott E. Lindsey, Brentwood, CA (US);
Thomas T. Maenner, San Ramon, CA (US);
Patrick M. Shepherd, San Jose, CA (US);
Jeffrey L. Tyson, Mountain View, CA (US);
Mark C. Carbone, Cupertino, CA (US);
Paul W. Burke, Hayward, CA (US);
Doan D. Cao, San Jose, CA (US);
James F. Tomic, Oakland, CA (US);
Long V. Vu, San Jose, CA (US);
AEHA Test Systems, Fremont, CA (US);
Abstract
An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.