The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2013
Filed:
May. 03, 2010
Thomas Bellingrath, Nuremberg, DE;
Thomas Bellingrath, Nuremberg, DE;
Cisco Technology, Inc., San Jose, CA (US);
Abstract
This invention relates to a coding circuit for generating a swap tolerant code. The coding circuit comprises a first and second input (), an odd parity pair detector (), a memory (), and an output circuit (). Each of the first and second inputs () receive a stream of serial data. The odd parity pair detector () outputs an odd parity pair signal if the bits received at said first and second inputs () have different logical values and therefore constitute an odd parity pair. The memory () stores information on a previous odd parity pair. The output circuit outputs the previous odd parity pair, if said first input () provides a logical 1 and said second input () provides a logical 0. The output circuit outputs the inverted previous odd parity pair, if said first input () provides a logical 0 and said second input () provides a logical 1. The invention further provides a corresponding decoding circuit, and coding and decoding methods. Further the invention relates to a coding circuit for inversion tolerant coding, a corresponding decoding circuit and coding and decoding methods.