The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2013

Filed:

Feb. 04, 2011
Applicants:

Chul Lee, Seoul, KR;

Hyeong-sun Hong, Seongnam-si, KR;

Deok-sung Hwang, Yongin-si, KR;

Jae-man Yoon, Hwaseong-si, KR;

Bong-soo Kim, Seongnam-si, KR;

Inventors:

Chul Lee, Seoul, KR;

Hyeong-Sun Hong, Seongnam-si, KR;

Deok-Sung Hwang, Yongin-si, KR;

Jae-Man Yoon, Hwaseong-si, KR;

Bong-Soo Kim, Seongnam-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/92 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a trench-type capacitor. To form the capacitor, first and second active regions are disposed in a semiconductor substrate. Node patterns are disposed in the first active region. Each node pattern may have a conductive pattern and an insulating pattern, which are sequentially stacked. Impurity diffusion regions are disposed in the vicinity of the node patterns. Substrate connection patterns in electrical contact with the first and second active regions are disposed. Node connection patterns in electrical contact with the node patterns are disposed in the vicinity of the first and second active regions. In addition, a semiconductor device having the trench-type capacitor and a semiconductor module having the semiconductor device is provided.


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