The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2013

Filed:

Dec. 14, 2009
Applicants:

Wally Haas, St. John's, CA;

Mutema John Pittman, St. John's, CA;

Inventors:

Wally Haas, St. John's, CA;

Mutema John Pittman, St. John's, CA;

Assignee:

Altera Canada Co., Ontario, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention discloses a method and apparatus for addressing the issue of clock skew in a data signal while making efficient use of space on an integrated chip (IC) by utilizing a physical delay line controlled by a state machine in conjunction with pre-requisite chip architecture. The pre-requisite chip architecture samples the incoming data signal in response to a clocking signal input from the physical delay line; the physical delay line responds to commands from the state machine to increment the delay of the physical delay line to produce samples which describe the incoming data signal and delineate its data valid window.


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