The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 2013
Filed:
Oct. 31, 2010
Ning Wu, Shenzhen, CN;
Hsin-kuan Wu, Taipei Hsien, TW;
Hou-yuan Chou, Taipei Hsien, TW;
Shun-bo Bai, Shenzhen, CN;
Yan-mei Zhu, Shenzhen, CN;
Ning Wu, Shenzhen, CN;
Hsin-Kuan Wu, Taipei Hsien, TW;
Hou-Yuan Chou, Taipei Hsien, TW;
Shun-Bo Bai, Shenzhen, CN;
Yan-Mei Zhu, Shenzhen, CN;
Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Shenzhen, CN;
Hon Hai Precision Industry Co., Ltd., New Taipei, TW;
Abstract
A PCB includes a number of insulation layers, a number of circuit layers, a signal-interfering component, and a signal-sensitive component. The circuit layers and the insulation layers are stacked alternately. The circuit layers include at least two first circuit layers, a second circuit layer, and a ground layer. The ground layer has a first side and a second side facing away the first side. The first circuit layers are positioned near the first side and include an outmost first circuit layer and at least one inner first circuit layer positioned between the outmost first circuit layer and the ground layer. The second circuit layer is positioned near the second side. The signal-interfering component is positioned on the outmost first circuit layer. The signal-sensitive component is positioned on the second circuit layer. Each inner first circuit layer defines a copper-remove area corresponding to an orthogonal projection of the signal-interfering component thereon.