The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2013

Filed:

Nov. 30, 2009
Applicants:

Theodore A. Antonakopoulos, Patras, GR;

Roy D. Cideciyan, Rueschlikon, CH;

Evangelos S. Eleftheriou, Rueschlikon, CH;

Robert Haas, Rueschlikon, CH;

Xiao-yu HU, Rueschlikon, CH;

Ilias Iliadis, Rueschlikon, CH;

Inventors:

Theodore A. Antonakopoulos, Patras, GR;

Roy D. Cideciyan, Rueschlikon, CH;

Evangelos S. Eleftheriou, Rueschlikon, CH;

Robert Haas, Rueschlikon, CH;

Xiao-Yu Hu, Rueschlikon, CH;

Ilias Iliadis, Rueschlikon, CH;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate.


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