The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 2013
Filed:
Feb. 17, 2010
Tokuaki Kuniyoshi, Osaka, JP;
Hidehito Kitakado, Osaka, JP;
Tadayoshi Miyamoto, Osaka, JP;
Kazuhide Tomiyasu, Osaka, JP;
Sumio Katoh, Osaka, JP;
Tokuaki Kuniyoshi, Osaka, JP;
Hidehito Kitakado, Osaka, JP;
Tadayoshi Miyamoto, Osaka, JP;
Kazuhide Tomiyasu, Osaka, JP;
Sumio Katoh, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
Provided is a thin film transistor manufacture method by which a thin film transistor provided with LDD regions can be produced without increasing the number of photo masks used. An etching stopper layer () formed on a polycrystalline silicon film () of a TFT () is used not only as a mask to protect a channel region () when a source electrode and a drain electrode are formed by etching, but also as a mask when ions are implanted to form a source/drain regions (). Thus, phosphorus, which is ion-implanted in the polycrystalline silicon film () to form the source/drain regions (), is not implanted in the LDD region () and, accordingly, it is not necessary to additionally form a resist pattern to be used as a mask when ions are implanted.