The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2013

Filed:

Dec. 15, 2009
Applicants:

Reuel William Nash, Austin, TX (US);

Yu Bai, Shanghai, CN;

Xiaowei LI, Shanghai, CN;

Inventors:

Reuel William Nash, Austin, TX (US);

Yu Bai, Shanghai, CN;

Xiaowei Li, Shanghai, CN;

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of verifying a performance model of an integrated circuit is provided. The method comprises the following steps: obtaining statistical request numbers and corresponding latency values of memory access requests; developing functions of latency value based on the statistical request numbers and the corresponding latency values; bringing a random value to one of the functions to retrieve a latency value; and verifying the logic of the performance model using the latency value retrieved in the step above.


Find Patent Forward Citations

Nash, Reuel. (2013). Method of verifying the performance model of an integrated circuit (U.S. Patent No. 8489377). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8489377

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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