The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2013
Filed:
May. 31, 2011
Bonnie I. Wang, Cupertino, CA (US);
Chiakang Sung, Milpitas, CA (US);
Joseph Huang, San Jose, CA (US);
Khai Nguyen, San Jose, CA (US);
Philip Pan, Fremont, CA (US);
Bonnie I. Wang, Cupertino, CA (US);
Chiakang Sung, Milpitas, CA (US);
Joseph Huang, San Jose, CA (US);
Khai Nguyen, San Jose, CA (US);
Philip Pan, Fremont, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Methods and apparatus for providing either high-speed, or lower-speed, flexible inputs and outputs. An input and output structure having a high-speed input, a high-speed output, a low or moderate speed input, and an low or moderate speed output is provided. One of the input and output circuits are selected and the others are deselected. The high-speed input and output circuits are comparatively simple, in one example having only a clear signal for a control line input, and are able to interface to lower speed circuitry inside the core of an integrated circuit. The low or moderate speed input and output circuits are more flexible, for example, having preset, enable, and clear as control line inputs, and are able to support JTAG boundary testing. These parallel high and lower speed circuits are user selectable such that the input output structure is optimized between speed and functionality depending on the requirements of the application.