The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2013

Filed:

Mar. 07, 2012
Applicants:

Manabu Iguchi, Kanagawa, JP;

Mami Miyasaka, Kanagawa, JP;

Inventors:

Manabu Iguchi, Kanagawa, JP;

Mami Miyasaka, Kanagawa, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 23/544 (2006.01); H01L 23/58 (2006.01); H01L 23/522 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 22/32 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate, and an insulating layer that is provided on the semiconductor substrate, wherein, in an internal circuit formation region of the insulating layer, a via hole and an interconnect trench, that is formed on the via hole and communicates with the via hole, are provided, in the via hole and the interconnect trench, a conductor is provided so as to integrally fill the via hole and said interconnect trench, in a dicing region of the insulating layer, a groove portion and an opening, that communicates with the groove portion and is formed to cover the groove portion when the semiconductor substrate is seen in plane view, are formed, and in the groove portion and the opening, a conductor is provided so as to integrally fill the groove portion and the opening.


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