The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8482981 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 09, 2013

Filed:

May. 30, 2008
Applicant:

Steffen Meyer, Dresden, DE;

Inventor:

Steffen Meyer, Dresden, DE;

Assignee:

Qimonda AG, München, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides an integrated circuit including N1 NAND flash array segments with N2 local bit lines, N1 intra array multiplexers and N2/2 global bit lines. Further, the present invention provides a method of producing an integrated circuit including N1 NAND flash array segments with N2 local bit lines, N1 intra array multiplexers and N2/2 global bit lines.


Find Patent Forward Citations

Meyer, Steffen. (2013). Method of forming an integrated circuit with nand flash array segments and intra array multiplexers and corresponding integrated circuit with nand flash array segments and intra array multiplexers (U.S. Patent No. 8482981). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8482981

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