The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2013

Filed:

Jun. 16, 2011
Applicants:

Vadim V. Ivanov, Tucson, AZ (US);

Harish Venkataraman, Wylie, TX (US);

Daniel A. King, Dallas, TX (US);

Inventors:

Vadim V. Ivanov, Tucson, AZ (US);

Harish Venkataraman, Wylie, TX (US);

Daniel A. King, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/082 (2006.01);
U.S. Cl.
CPC ...
Abstract

A comparator () includes a first input transistor (M) having a drain coupled to a gate and drain of a first diode-connected transistor (M) and a gate of a first current mirror output transistor (M), and a second input transistor (M) having a drain coupled to a gate and drain of a second diode-connected transistor (M) and a gate of a second current mirror output transistor (M). Sources of the first and second current mirror output transistors are connected to a supply voltage (V). Gates of the first and second input transistors are coupled to first (V) and second (V) input signals, respectively. Sources of the first and second diode-connected transistors are coupled to drains of the first and second current mirror output transistors, respectively. A latch circuit (M,M) is coupled to the drains of the first and second current mirror output transistors.


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