The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2013
Filed:
Jul. 26, 2011
Memory architecture having multiple partial wordline drivers and contacted and feed-through bitlines
Raymond J. Sung, Sunnyvale, CA (US);
Dongwook Suh, Saratoga, CA (US);
Daniel O. Rodriguez, Hayward, CA (US);
Raymond J. Sung, Sunnyvale, CA (US);
Dongwook Suh, Saratoga, CA (US);
Daniel O. Rodriguez, Hayward, CA (US);
Broadcom Corporation, Irvine, CA (US);
Abstract
Various embodiments are disclosed relating to a memory circuit architecture. In an example embodiment, which may accommodate a change to a new memory size or cell aspect ratio, while migrating between different process nodes or the same process generation, while retaining at least a portion of the periphery circuitry, a memory circuit architecture may be employed in which the memory array is divided into an upper half and a lower half, thereby splitting the cache Ways among the two halves. The wordline may be split among the two array halves, with each half driven by a half wordline driver. Also, in another embodiment, two sets of bitlines may be provided for each column, including a contacted set of bitlines and a feed-through set of bitlines.