The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2013

Filed:

Nov. 02, 2012
Applicant:

Hannstar Display Corporation, New Taipei, TW;

Inventors:

Chia-Hua Yu, New Taipei, TW;

Kun-Cheng Lee, Tainan, TW;

I-Fang Wang, Changhua County, TW;

Feng-Wei Kuo, Pingtung County, TW;

Assignee:

Hannstar Display Corp., New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1343 (2006.01); G02F 1/136 (2006.01); C09K 19/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A liquid crystal display panel includes a pixel array substrate, an opposite substrate, and a twisted nematic (TN) liquid crystal layer located between the two substrates. The pixel array substrate includes a first substrate, gate lines, data lines, thin film transistors (TFTs) coupled to the gate lines and the data lines, a first insulation layer, a transparent conductive layer, a second insulation layer, and pixel electrodes coupled to the TFTs through contact holes in the first and second insulation layers. The first insulation layer covers the gate lines, the data lines, and the TFTs. The transparent conductive layer, the second insulation layer, and the pixel electrodes are sequentially stacked on the first insulation layer and constitute a storage capacitor. A phase retardation value of the TN liquid crystal layer ranges from 250 to 480, and a dielectric anisotropy Δ∈ of the TN liquid crystal layer ranges from 3 to 10.


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