The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2013

Filed:

Aug. 25, 2011
Applicants:

Michael R. Scheuermann, Katonah, NY (US);

Joel A. Silberman, Somers, NY (US);

Matthew R. Wordeman, Kula, HI (US);

Inventors:

Michael R. Scheuermann, Katonah, NY (US);

Joel A. Silberman, Somers, NY (US);

Matthew R. Wordeman, Kula, HI (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/48 (2006.01); H01L 29/40 (2006.01); H01L 23/02 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
Abstract

There is provided a connection configuration for a multiple layer chip stack having two or more strata. Each of the two or more strata has multiple circuit components, a front-side and a back-side. The connection configuration includes a connection pair having as members a front-side connection and a backside connection unconnected to the front-side connection. The front-side connection and the backside connection are co-located with respect to each other on a given stratum from among the two or more strata, and are respectively connected to different ones of the multiple circuit components on the given stratum. At least one of the front-side connection and the backside connection is also connected to a particular one of the multiple circuit components on an adjacent stratum to the given stratum from among the two or more strata.


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