The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2013
Filed:
Dec. 05, 2008
Myung-kwan Ryu, Yongin-si, KR;
Kyung-bae Park, Seoul, KR;
Sang-yoon Lee, Seoul, KR;
Jang-yeon Kwon, Seongnam-si, KR;
Byung-wook Yoo, Yongin-si, KR;
Tae-sang Kim, Seoul, KR;
Kyung-seok Son, Seoul, KR;
Ji-sim Jung, Incheon, KR;
Myung-kwan Ryu, Yongin-si, KR;
Kyung-bae Park, Seoul, KR;
Sang-yoon Lee, Seoul, KR;
Jang-yeon Kwon, Seongnam-si, KR;
Byung-wook Yoo, Yongin-si, KR;
Tae-sang Kim, Seoul, KR;
Kyung-seok Son, Seoul, KR;
Ji-sim Jung, Incheon, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
Provided may be a Poly-Si thin film transistor (TFT) and a method of manufacturing the same. The Poly-Si TFT may include a first Poly-Si layer on an active layer formed of Poly-Si and doped with a low concentration; and a second Poly-Si layer on the first Poly-Si layer and doped with the same concentration as the first Poly-Si layer or with a higher concentration than the first Poly-Si layer, wherein lightly doped drain (LDD) regions capable of reducing leakage current may be formed in inner end portions of the first Poly-Si layer.